Regviz

Silicon Labs /EFR32BG21B020F768IM32 /RAC_S /CLKMULTEN1

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CLKMULTEN1

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Silicon Labs/BGM210LA22JNF/RAC_NS/CLKMULTEN1#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CLKMULTINNIBBLE 0 (disable)CLKMULTLDCNIB 0 (disable)CLKMULTLDFNIB 0 (disable)CLKMULTLDMNIB 0 (quarter_nibble)CLKMULTRDNIBBLE

CLKMULTLDMNIB=disable, CLKMULTRDNIBBLE=quarter_nibble, CLKMULTLDFNIB=disable, CLKMULTLDCNIB=disable

Fields

CLKMULTINNIBBLE

CLKMULTINNIBBLE
CLKMULTLDCNIB

CLKMULTLDCNIB

0 (disable): undefined

1 (enable): undefined
CLKMULTLDFNIB

CLKMULTLDFNIB

0 (disable): undefined

1 (enable): undefined
CLKMULTLDMNIB

CLKMULTLDMNIB

0 (disable): undefined

1 (enable): undefined
CLKMULTRDNIBBLE

CLKMULTRDNIBBLE

0 (quarter_nibble): undefined

1 (fine_nibble): undefined

2 (moderate_nibble): undefined

3 (coarse_nibble): undefined

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data